| Before joining NTU, I worked as an Intern at Xilinx Research Labs, India. At Xilinx, I explored efficient architectures for networking protocols targeting NetFPGA platform, using High-Level Synthesis tools. I also worked on designing a TCP Segmentation Offload Engine targeted for 10G devices. I completed my Bachelors of Technology with Honors in Electronics and Communication Engineering from International Institute of Information Technology, Hyderabad(IIIT-H), India. Here, I worked as a research scholar at the Centre for VLSI and Embedded System Technologies (CVEST). There, I undertook various projects under the able guidance of Prof. M B Srinivas, Prof. R N Biswas, Dr. R B Pachori; and consequently published two papers in reputed conferences. |
